#ifndef REG_PORT_H_
#define REG_PORT_H_
/******************************************************************
| includes
| 1) system and project includes
| 2) needed interfaces from external units
| 3) internal and external interfaces from this unit
|-----------------------------------------------------------------*/
#include "Reg_Macros.h"

/*******************************************************************
| defines and macros (scope: module-local)
|------------------------------------------------------------------*/
#define PORT_BASE_ADDRESS			0xF0000C00UL
#define PORT_ADDRESS_EACH_LENGTH	0x00000100UL
#define PORT_IOCR_EACH_LENGTH		0x00000004UL
#define PORT_OFFSET(offset)			(PORT_ADDRESS_EACH_LENGTH * ((uint32)(offset)))
#define PORT_IOCR_OFFSET(index)		(PORT_IOCR_EACH_LENGTH * ((uint32)(index)))
#define PORT_IOCR_BASE(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x10UL)

/*Pn_OUT*/
#define PORT_REG_OUT(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x00UL)
/*Pn_OMR*/
#define PORT_REG_OMR(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x04UL)
/*Pn_IOCR0*/
#define PORT_REG_IOCR0(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x10UL)
/*Pn_IOCR4*/
#define PORT_REG_IOCR4(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x14UL)
/*Pn_IOCR8*/
#define PORT_REG_IOCR8(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x18UL)
/*Pn_IOCR12*/
#define PORT_REG_IOCR12(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x1CUL)
/*Pn_IOCRm*/
#define PORT_REG_IOCR(offset, index)	(PORT_IOCR_BASE(offset) + PORT_IOCR_OFFSET(index))
/*Pn_IN*/
#define PORT_REG_IN(offset)			(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x24UL)
/*Pn_PDR*/
#define PORT_REG_PDR(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x40UL)
/*Pn_ESR*/
#define PORT_REG_ESR(offset)		(PORT_BASE_ADDRESS + PORT_OFFSET(offset) + 0x50UL)

/*Mask of PCn*/
#define PORT_REG_PC_MASK(pos)		(0xF0UL << ((uint32)pos*8UL))
/*Read PCn*/
#define Read_Port_PC(offset, index, pos)	((REG_READ32(PORT_REG_IOCR(offset, index)) & PORT_REG_PC_MASK(pos)) >> ((uint32)pos*8UL+4UL))
/*Write PCn*/
#define Write_Port_PC(offset, index, pos, value) (REG_WRITE32((PORT_REG_IOCR(offset, index)), ((REG_READ32(PORT_REG_IOCR(offset, index)) & (~(PORT_REG_PC_MASK(pos)))) | ((uint32)(value) << ((pos*8UL)+4UL)))))

/*Mask of PDn*/
#define PORT_REG_PD_MASK(pos)				(0x07UL << ((uint32)pos*4UL))
/*Read PDn*/
#define Read_Port_PD(offset, pos)			((REG_READ32(PORT_REG_PDR(offset)) & PORT_REG_PD_MASK(pos)) >> ((uint32)pos*4UL))

/*Write PDn*/
#define Write_Port_PD(offset, pos, value) 	(REG_WRITE32((PORT_REG_PDR(offset)), ((REG_READ32(PORT_REG_PDR(offset)) & (~(PORT_REG_PD_MASK(pos)))) | ((uint32)(value) << (pos*4UL)))))

/*Mask of Pin*/
#define PORT_REG_OUT_PIN_MASK(pinId)		(1UL<<(uint32)pinId)
/*Read Pn_OUT*/
#define Read_Port_OUT(offset, pinId)		((REG_READ32(PORT_REG_OUT(offset)) & (PORT_REG_OUT_PIN_MASK(pinId))) >> ((uint32)pinId))
/*Read OUT*/
#define Read_Port_OUT_Reg(offset)			((uint16)(REG_READ32(PORT_REG_OUT(offset))))
/*Write OUT*/
#define Write_Port_OUT_Reg(offset, value)			(REG_WRITE32(PORT_REG_OUT(offset), ((uint32)(value))))

/*Write Pn_OUT*/
#define Write_Port_OUT(offset, pinId, value)	(REG_WRITE32((PORT_REG_OUT(offset)),((REG_READ32(PORT_REG_OUT(offset))&(~(PORT_REG_OUT_PIN_MASK(pinId)))) | ((uint32)(value)<<pinId))))
/*Set Pn_OUT bit*/
#define Set_Port_OUT(offset, pinId)			(REG_BIT_SET((PORT_REG_OUT(offset)), (PORT_REG_OUT_PIN_MASK(pinId))))
/*Clear Pn_OUT bit*/
#define Clear_Port_OUT(offset, pinId)		(REG_BIT_CLEAR((PORT_REG_OUT(offset)), (PORT_REG_OUT_PIN_MASK(pinId))))


/*Mask of PR*/
#define PORT_REG_OMR_PR_MASK(pinId)			(1UL<<((uint32)pinId + 16UL))
/*Read Pn_OMR_PR*/
#define Read_Port_PR(offset, pinId)			((REG_READ32(PORT_REG_OMR(offset)) & (PORT_REG_OMR_PR_MASK(pinId))) >> ((uint32)pinId + 16UL))
/*Write Pn_OMR_PR*/
#define Write_Port_PR(offset, pinId, value)	(REG_WRITE32((PORT_REG_OMR(offset)),((REG_READ32(PORT_REG_OMR(offset))&(~(PORT_REG_OMR_PR_MASK(pinId)))) | ((uint32)(value)<<((uint32)(pinId)+16UL)))))
/*Set PR bit*/
#define Set_Port_PR(offset, pinId)			(REG_BIT_SET((PORT_REG_OMR(offset)), (PORT_REG_OMR_PR_MASK(pinId))))
/*Clear PR bit*/
#define Clear_Port_PR(offset, pinId)		(REG_BIT_CLEAR((PORT_REG_OMR(offset)), (PORT_REG_OMR_PR_MASK(pinId))))

/*Mask of PS*/
#define PORT_REG_OMR_PS_MASK(pinId)			(1UL<<((uint32)pinId))
/*Read Pn_OMR_PS*/
#define Read_Port_PS(offset, pinId)			((REG_READ32(PORT_REG_OMR(offset)) & (PORT_REG_OMR_PS_MASK(pinId))) >> ((uint32)pinId))
/*Write Pn_OMR_PS*/
#define Write_Port_PS(offset, pinId, value)	(REG_WRITE32((PORT_REG_OMR(offset)),((REG_READ32(PORT_REG_OMR(offset))&(~(PORT_REG_OMR_PS_MASK(pinId)))) | ((uint32)(value)<<((uint32)(pinId))))))
/*Set PS bit*/
#define Set_Port_PS(offset, pinId)			(REG_BIT_SET((PORT_REG_OMR(offset)), (PORT_REG_OMR_PS_MASK(pinId))))
/*Clear PS bit*/
#define Clear_Port_PS(offset, pinId)		(REG_BIT_CLEAR((PORT_REG_OMR(offset)), (PORT_REG_OMR_PS_MASK(pinId))))

/*Mask of EN*/
#define PORT_REG_SER_EN_MASK(pinId)			(1UL<<((uint32)pinId))
/*Read Pn_ESR_EN*/
#define Read_Port_EN(offset, pinId)			((REG_READ32(PORT_REG_ESR(offset)) & (PORT_REG_SER_EN_MASK(pinId))) >> ((uint32)pinId))
/*Write Pn_ESR_EN*/
#define Write_Port_EN(offset, pinId, value)	(REG_WRITE32((PORT_REG_ESR(offset)),((REG_READ32(PORT_REG_ESR(offset))&(~(PORT_REG_SER_EN_MASK(pinId)))) | ((uint32)(value)<<((uint32)(pinId))))))
/*Set En bit*/
#define Set_Port_EN(offset, pinId)			(REG_BIT_SET((PORT_REG_ESR(offset)), (PORT_REG_SER_EN_MASK(pinId))))
/*Clear En bit*/
#define Clear_Port_EN(offset, pinId)		(REG_BIT_CLEAR((PORT_REG_ESR(offset)), (PORT_REG_SER_EN_MASK(pinId))))


/*Mask of Pin*/
#define PORT_REG_IN_PIN_MASK(pinId)			(1UL<<(uint32)pinId)
/*Read Pn_IN*/
#define Read_Port_IN(offset, pinId)			((REG_READ32(PORT_REG_IN(offset)) & (PORT_REG_IN_PIN_MASK(pinId))) >> ((uint32)(pinId)))
/*Read IN*/
#define Read_Port_IN_Reg(offset)			((uint16)(REG_READ32(PORT_REG_IN(offset))))


#endif /* REG_PORT_H_ */
